Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design Read More » December 24, 2025
A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks Read More » December 24, 2025
Utilizing YOLO Models for Real-World Scenarios: Assessing Novel Mixed Defect Detection Dataset in PCBs Read More » December 24, 2025
Computing in-memory reconfigurable (accurate/approximate) adder design with negative capacitance FET 6T-SRAM for energy efficient AI edge devices Read More » December 24, 2025
CSDNet: A Novel Deep Learning Framework for Improved Cataract State Detection Read More » December 24, 2025
Negative capacitance FET based dual-split control 6T-SRAM cell design for energy efficient and robust computing-in memory architectures Read More » December 24, 2025
FeSATLock: An Energy Efficient and SAT Attack Resilient Logic Locking Design with FeFET LUT Architecture for Enhanced Hardware Security Read More » December 24, 2025
An Energy Efficient and DPA Attack Resilient NCFET-Based S-Box Design for Secure and Lightweight SLIM Ciphers Read More » December 24, 2025
Design of an SLIM Cipher S-box with 8T-SRAM CiM for Energy-Efficient, Lightweight, and DPA Resistant Edge AI Read More » December 24, 2025
TRSBi-YOLO: Transformer based lightweight and high-performance model for PCB defects detection Read More » December 24, 2025
