In the field of MEMS, there is a wide use of capacitive sensors for several applications like pressure sensor, accelerometers etc. in internet of things (IoT) applications. Due to this we also need analog to digital converters which are more compact and can provide better gain. Hence, in this research, we are designing a Capacitance to Digital converter using MASH Sigma-Delta Architecture in the ADC part which can provide better SNR than the existing methods. MASH Sigma-Delta Architecture provides excellent Noise-Shaping which helps in increasing the circuit efficiency. A switched capacitor circuit is used for capacitance-to-voltage conversion, and the voltage output is fed to the MASH Sigma Delta ADC. Switched capacitance circuits provide better frequency response, and the ADC part provides better noise rejection and gain. This design is implemented in the Cadence Virtuoso environment using 90nm technology. We designed the building blocks and integrated them to form the whole CDC circuit and the simulation results and performance metrics validate the proposed concept. In this implementation, we calculated the metrics of the circuits by the parameters and achieved an SNR of 77.62 dB with a capacitive resolution of 78.13 aF.