Analytical potential distribution model for underlap double gate MOSFETs with 3T-4T and symmetric-asymmetric options for subthreshold operation: A conformal mapping approach Read More » December 24, 2025
Effect of gate – S/D underlap, asymmetric and independent gate features in the minimization of short channel effects in nanoscale DGMOSFET Read More » December 24, 2025
Two dimensional analytical subthreshold current model of a generic double gate MOSFET with gate underlap Read More » December 24, 2025
Two dimensional analytical subthreshold swing model of a double gate MOSFET with Gate-S/D underlap, asymmetric and independent gate features Read More » December 24, 2025
Optimization of vertical silicon nanowire based solar cell using 3D TCAD simulation Read More » December 24, 2025
Ultra-low power high efficient rectifiers with 3T/4T double-gate MOSFETs for RFID applications Read More » December 24, 2025
Design and analysis of anchorless shuttle nano-electro-mechanical non-volatile memory for high temperature applications Read More » December 24, 2025
Enhanced bias-flip rectifier with ultra-low power control for piezo electric energy harvester in the microwatt application scenario Read More » December 24, 2025
Designing energy efficient logic gates with Hetero junction Tunnel fets at 20nm Read More » December 24, 2025
