Nanosheet-FET Performance Study for Analog and Digital/RF Applications

Publications

Nanosheet-FET Performance Study for Analog and Digital/RF Applications

Year : 2024

Publisher : Institute of Electrical and Electronics Engineers Inc.

Source Title : APSCON 2024 - 2024 IEEE Applied Sensing Conference, Proceedings

Document Type :

Abstract

We discuss the probable replacement of FinFETs and gate-all-around (GAA) with nanosheet field effect transistor (NS-FET), which will continue to generate advantageous node to node scaling advantages. Improved electrostatics compared to FinFETs, gate-all-around and allowing for further gate length (Lgate) shrinkage, high design flexibility (a variety of NS widths are allowed), and larger drivability (ION) per layout footprint are all benefits of NS FETs, which increase the number of vertically stacked NS per device. The user is able to change the width of the sheet of the Nanosheet Field Effect Transistors in order to change the output currents (ID). it has an identical structure like Nanowire FET except the width is wider compared to nanowire FET, and can manage leakage current more effectively, which enhances high-power transistor performance. The greatest IONIOFF ratio, highest ON current (ION), lowest OFF current (IOFF), are all characteristics of the NS FET, which also has the higher subthreshold performance. With an ION/IOFF ratio of 109, a subthreshold slope (SS) of 62.5 mV/dec, and the threshold voltage of 0.37 V, the nanosheet FET attained the good electric properties. 3-D computer-aided design (TCAD) is used to simulate the nanosheet FET device. The analog and digital/RF performance of the device is also studied. The outcome shows the NSFET’s enormous potential for forthcoming analog and digital circuit applications.