Faculty Dr Naresh Kumar Vemula

Dr Naresh Kumar Vemula

Assistant Professor

Department of Electrical and Electronics Engineering

Contact Details

nareshkumar.v@srmap.edu.in

Office Location

14, Level 3, CV Block

Education

2021
PhD
Indian Institute of Technology
India
2013
Mtech
National Institute of Technology
India
2011
B.Tech
Vignan Institute of Information Technology
India

Experience

  • March 2022 to May 2023 - Associate Professor - Lendi Institute of Engineering of Technology, Vizianagaram, Andhra Pradesh

Research Interest

  • Small signal stability assessment and enhancement of inverter-fed autonomous microgrids
  • Improvement in dynamic response of parallel operated inverters with different control techniques
  • Parametric optimization and delay compensation to improve robustness in a Microgrid

Awards

  • 2019 – MHRD SPARC Scheme Fellowship – IIT Patna

Memberships

No data available

Publications

  • A cost-effective hardware accelerator for PMDC motor-based auxiliary component automation of electric three-wheelers

    Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, Atanu Banerjee., Mousam Ghosh., Pramod Kumar Meher., B Chitti Babu

    Source Title: AEU - International Journal of Electronics and Communications, Quartile: Q1

    View abstract ⏷

    A quadral-duty digital pulse width modulation (QDPWM) control-based hardware accelerator for the auxiliary permanent magnet brushed DC (PMDC) motors of electric three-wheelers (E3Ws) is proposed. The proposed accelerator involves a precise motor speed calculation circuit, including a buffer to hold the position encoder signal for a predefined number of clock cycles to eliminate encoder signal noise. The proposed hardware accelerator is described with supporting mathematical models and is implemented on field-programmable gate array (FPGA) as well as application-specific integrated circuit (ASIC) platforms using SCL 180 nm CMOS technology library. The ASIC implementation at 12.5 MHz shows that the proposed design has significantly less area and power consumption than the conventional PI-PWM controller-based architecture and is comparable to the dual-duty digital pulse width modulation (DDPWM) controller. The proposed FPGA prototype-driven motor attains a wider speed range with low-speed ripple than DDPWM controller-based architecture. The position signal buffer circuit also enables the accelerator to tolerate noise or glitches in the position encoder signal, which makes the speed calculation precise and reliable. The proposed hardware accelerator-based PMDC drive performance has been validated regarding settling time, speed tracking ability, tolerance to dynamic speed, and load variations on a laboratory test setup
  • Enhancement of Dynamic Performance and stability of Autonomous Microgrid Utilizing Adaptive HBO-Power System Stabilizer

    Dr Naresh Kumar Vemula, Andrew Joseph Mbusi., Idris Abdallah Nasreldin

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    Power and frequency instability pose significant challenges in microgrid operation, which restricts load sharing and degrades dynamic performance. Existing control methods often involve trade-offs between stability and power sharing. Conventional power system stabilizers (PSS) utilize lead-lag compensators with parameters selected arbitrarily, resulting in less than optimal performance during disturbances. This research paper presents a novel, generalized PSS designed for inverter-based microgrids. It incorporates an adaptive Honey Bee Optimization (HBO) algorithm for dynamic tuning of the lead compensator parameters T1,T2, and gain K. Unlike traditional methods, the proposed HBO-PSS improves the damping of low-frequency oscillations and enhances power sharing accuracy, while maintaining stable output voltage. The time-domain simulation results indicate that the adaptive HBO-PSS demonstrates superior performance compares to existing methodologies. The proposed PSS facilitates faster and more equitable power sharing, while also enhancing stability significantly, even in the presence of switching disturbances and higher droop coefficients. This work simplifies the implementation and analysis of PSS while facilitating future research into decentralized control strategies for distributed energy systems
  • Customized Inverter Configuration for Multiple pole-Pair Stator Winding Induction Motor Drive with Reduced DC Bus Voltage

    Dr Kiran Kumar Nallamekala, Dr Tarkeshwar Mahto, Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, K K N V A Manikanta., G Jawahar Sagar

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    A new customized multi-level inverter (MLI) configuration is proposed for induction motor drive, aiming to lower the requirement of DC bus voltage magnitude. This method utilizes pole pair winding coils separately to generate multi-level voltage waveform across the total stator phase windings. As the inverter requires lower input voltage it eliminates the requirement of boost converters when it is used in the EV applications. The inherent advantages of this topology significantly reduce control complexity in the battery systems by reducing the number of series-connected battery cells. The conventional LevelShifted Sine Triangle PWM technique proficiently shifts low-frequency harmonics to the carrier frequency, enhancing power quality and minimizing electromagnetic interference. Through MATLAB simulation, this new customized multi-level inverterfed open-end stator winding Induction motor is simulated and results are presented to validate the proposed concept. Ultimately, our research aims to contribute to advancing electric vehicle technology by operating the induction motor with minimal input DC source voltage, and substantial output gain
  • A Finite Control Set based Model Predictive Controller for Load Power Sharing Applications in Inverter Fed Microgrids

    Dr Naresh Kumar Vemula, Ms Devarapalli Vimala, Bhamidi Lokeshgupta

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    Microgrids have gained more attention in recent days due to the efficient integration of various distributed energy resources. However, the load power sharing between the distribution generators (DGs) in the microgrids is one of the major challenges, especially at the peak load demand condition. This paper proposes a finite control set-based model predictive controller (FCS-MPC) for the DG-fed inverters in microgrid applications. A universal droop controller model is also considered into account to generate the reference values for the proposed FCS-MPC controller for improved power sharing. The main goal of this paper is to efficiently regulate the power flow from/to the parallel DGs in a microgrid environment. The proposed control method is able to share equal load power, though there is a mismatch in line impedances in the AC microgrid network. In this study, the microgrid test system with two parallel DGs is used to evaluate the performance of the proposed model. To show the effectiveness of the proposed control method, the simulation results of the proposed model have also been compared with the conventional droop control technique. The proposed model has superior performance compared to the conventional droop controller in terms of load power sharing and maintaining tolerance limits, as evidenced by the simulation results
  • Design and Analysis of DC-DC Boost converter using Model Predictive Controller

    Dr Naresh Kumar Vemula, Ms Devarapalli Vimala, Devarapalli Vimala., Bhamidi Lokeshgupta

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    A boost converter is a type of device used to convert direct current (DC) from one voltage level to another. It operates by increasing the input voltage to a higher output voltage level.DC-DC converters are utilised in a wide range of applications. The primary application of boost converters is to establish an interface with renewable energy sources.This paper presents a comparative analysis of two controllers, namely the Proportional Integral controller and Model Predictive Control (MPC), for practical applications of the Boost converter. The boost converter is designed and simulated in the MATLAB/SIMULINK environment for this study.The performance of the MPC controller is found to be superior when compared to the PI controller.The effectiveness of the proposed control scheme is validated through the utilisation of OPAL-RT
  • An optimized integral performance criterion based commercial PID controller design for boost converter

    Dr Naresh Kumar Vemula, Gundavarapu Venkata Nagesh Kumar., Łukasz Knypiński., Mohammad Irshad., Ramesh Devarapalli

    Source Title: Journal of Electrical Engineering, Quartile: Q3

    View abstract ⏷

    Boost converters often face challenges such as sluggish dynamic behavior, inadequate voltage regulation, and variations in input voltage and load current. These issues necessitate the need for closed-loop operation. Nature-inspired optimization algorithms (NIOA) have demonstrated their effectiveness in delivering enhanced solutions for various engineering problems. Several studies have been conducted on the use of proportional-integral-derivative (PID) controllers for controlling boost converters, as documented in the literature. Some studies have shown that using fractional order PID (FO-PID) controllers can lead to better performance than traditional PID controllers. Nevertheless, implementing FO-PID can be quite complex. Considering the widespread use of commercial PID controllers in industrial settings, this study focuses on finding the best tuning for these controllers in DC-DC boost converters. The approach used is particle swarm optimization (PSO) based on integral performance criteria. Simulation results indicate that the proposed controller achieves superior performance, evidenced by the lowest settling time, overshoot, integral absolute error (IAE), and integral squared error (ISE) values under varying input voltage and load current conditions, compared to both PID and FO-PID controllers. These findings have been confirmed through hardware implementation, which demonstrates the effectiveness of the proposed controller.
  • Investigation into PV Inverter Topologies from the Standards Compliance Viewpoint

    Dr Naresh Kumar Vemula, Hasan M A., Devarapalli R., Knypiński Ł

    Source Title: Energies, Quartile: Q1

    View abstract ⏷

    Numerous reviews are available in the literature on PV inverter topologies. These reviews have intensively investigated the available PV inverter topologies from their modulation techniques, control strategies, cost, and performance aspects. However, their compliance with industrial standards has not been investigated in detail so far in the literature. There are various standards such as North American standards (UL1741, IEEE1547, and CSA 22.2) and Australian and European safety standards and grid codes, which include IEC 62109 and VDE. These standards provide detailed guidelines and expectations to be fulfilled by a PV inverter topology. Adherence to these standards is essential and crucial for the successful operation of PV inverters, be it a standalone or grid-tied mode of operation. This paper investigates different PV inverter topologies from the aspect of their adherence to different standards. Both standalone and grid-tied mode of operation-linked conditions have been checked for different topologies. This investigation will help power engineers in selecting suitable PV inverter topology for their specific applications. © 2024 by the authors.
  • Quasi-Steady-State Modeling of BLDC Motor Equivalent Circuit for Discontinuous Current Conduction with Unipolar PWM

    Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, Dr Kiran Kumar Nallamekala, Mousam Ghosh., Kaibalya Prasad Panda

    Source Title: 2024 IEEE 4th International Conference on Sustainable Energy and Future Electric Transportation (SEFET),

    View abstract ⏷

    The equivalent circuit of a voltage source inverter (VSI) fed brushless DC (BLDC) motor is similar to a buck converter supplied brushed DC motor. This analogy derives a linear relationship between the duty ratio and motor speed for continuous current conduction mode (CCCM). However, this relationship is not linear for discontinuous current conduction mode (DCCM), which is not generally considered in literature while controllers are designed. The DCCM of the BLDC motor driven by unipolar pulse width modulation (PWM) controlled voltage source inverter is analyzed, and corresponding quasi-steady-state model is derived in this paper. The motor speed can be precisely determined by simple computations with the proposed DCCM model, which can lead to complexity reduction in controller design. The effectiveness of the proposed model has been validated by the simulation and experimental analysis.

Patents

  • A finite control set-based model predictive controller for load power-sharing applications in inverter-fed microgrids

    Dr Naresh Kumar Vemula

    Patent Application No: 202541005327, Date Filed: 22/01/2025, Date Published: 25/04/2025, Status: Published

  • An adaptive hbo-powered system stabilizer for enhanced dynamic performance and stability of autonomous microgrids

    Dr Naresh Kumar Vemula

    Patent Application No: 202541005326, Date Filed: 22/01/2025, Date Published: 25/04/2025, Status: Published

Projects

Scholars

Doctoral Scholars

  • Ms Devarapalli Vimala

Interests

  • Microgrid
  • Power System
  • Small Signal Stability Analysis and Control

Thought Leaderships

There are no Thought Leaderships associated with this faculty.

Top Achievements

Research Area

No research areas found for this faculty.

Education
2011
B.Tech
Vignan Institute of Information Technology
India
2013
Mtech
National Institute of Technology
India
2021
PhD
Indian Institute of Technology
India
Experience
  • March 2022 to May 2023 - Associate Professor - Lendi Institute of Engineering of Technology, Vizianagaram, Andhra Pradesh
Research Interests
  • Small signal stability assessment and enhancement of inverter-fed autonomous microgrids
  • Improvement in dynamic response of parallel operated inverters with different control techniques
  • Parametric optimization and delay compensation to improve robustness in a Microgrid
Awards & Fellowships
  • 2019 – MHRD SPARC Scheme Fellowship – IIT Patna
Memberships
No data available
Publications
  • A cost-effective hardware accelerator for PMDC motor-based auxiliary component automation of electric three-wheelers

    Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, Atanu Banerjee., Mousam Ghosh., Pramod Kumar Meher., B Chitti Babu

    Source Title: AEU - International Journal of Electronics and Communications, Quartile: Q1

    View abstract ⏷

    A quadral-duty digital pulse width modulation (QDPWM) control-based hardware accelerator for the auxiliary permanent magnet brushed DC (PMDC) motors of electric three-wheelers (E3Ws) is proposed. The proposed accelerator involves a precise motor speed calculation circuit, including a buffer to hold the position encoder signal for a predefined number of clock cycles to eliminate encoder signal noise. The proposed hardware accelerator is described with supporting mathematical models and is implemented on field-programmable gate array (FPGA) as well as application-specific integrated circuit (ASIC) platforms using SCL 180 nm CMOS technology library. The ASIC implementation at 12.5 MHz shows that the proposed design has significantly less area and power consumption than the conventional PI-PWM controller-based architecture and is comparable to the dual-duty digital pulse width modulation (DDPWM) controller. The proposed FPGA prototype-driven motor attains a wider speed range with low-speed ripple than DDPWM controller-based architecture. The position signal buffer circuit also enables the accelerator to tolerate noise or glitches in the position encoder signal, which makes the speed calculation precise and reliable. The proposed hardware accelerator-based PMDC drive performance has been validated regarding settling time, speed tracking ability, tolerance to dynamic speed, and load variations on a laboratory test setup
  • Enhancement of Dynamic Performance and stability of Autonomous Microgrid Utilizing Adaptive HBO-Power System Stabilizer

    Dr Naresh Kumar Vemula, Andrew Joseph Mbusi., Idris Abdallah Nasreldin

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    Power and frequency instability pose significant challenges in microgrid operation, which restricts load sharing and degrades dynamic performance. Existing control methods often involve trade-offs between stability and power sharing. Conventional power system stabilizers (PSS) utilize lead-lag compensators with parameters selected arbitrarily, resulting in less than optimal performance during disturbances. This research paper presents a novel, generalized PSS designed for inverter-based microgrids. It incorporates an adaptive Honey Bee Optimization (HBO) algorithm for dynamic tuning of the lead compensator parameters T1,T2, and gain K. Unlike traditional methods, the proposed HBO-PSS improves the damping of low-frequency oscillations and enhances power sharing accuracy, while maintaining stable output voltage. The time-domain simulation results indicate that the adaptive HBO-PSS demonstrates superior performance compares to existing methodologies. The proposed PSS facilitates faster and more equitable power sharing, while also enhancing stability significantly, even in the presence of switching disturbances and higher droop coefficients. This work simplifies the implementation and analysis of PSS while facilitating future research into decentralized control strategies for distributed energy systems
  • Customized Inverter Configuration for Multiple pole-Pair Stator Winding Induction Motor Drive with Reduced DC Bus Voltage

    Dr Kiran Kumar Nallamekala, Dr Tarkeshwar Mahto, Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, K K N V A Manikanta., G Jawahar Sagar

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    A new customized multi-level inverter (MLI) configuration is proposed for induction motor drive, aiming to lower the requirement of DC bus voltage magnitude. This method utilizes pole pair winding coils separately to generate multi-level voltage waveform across the total stator phase windings. As the inverter requires lower input voltage it eliminates the requirement of boost converters when it is used in the EV applications. The inherent advantages of this topology significantly reduce control complexity in the battery systems by reducing the number of series-connected battery cells. The conventional LevelShifted Sine Triangle PWM technique proficiently shifts low-frequency harmonics to the carrier frequency, enhancing power quality and minimizing electromagnetic interference. Through MATLAB simulation, this new customized multi-level inverterfed open-end stator winding Induction motor is simulated and results are presented to validate the proposed concept. Ultimately, our research aims to contribute to advancing electric vehicle technology by operating the induction motor with minimal input DC source voltage, and substantial output gain
  • A Finite Control Set based Model Predictive Controller for Load Power Sharing Applications in Inverter Fed Microgrids

    Dr Naresh Kumar Vemula, Ms Devarapalli Vimala, Bhamidi Lokeshgupta

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    Microgrids have gained more attention in recent days due to the efficient integration of various distributed energy resources. However, the load power sharing between the distribution generators (DGs) in the microgrids is one of the major challenges, especially at the peak load demand condition. This paper proposes a finite control set-based model predictive controller (FCS-MPC) for the DG-fed inverters in microgrid applications. A universal droop controller model is also considered into account to generate the reference values for the proposed FCS-MPC controller for improved power sharing. The main goal of this paper is to efficiently regulate the power flow from/to the parallel DGs in a microgrid environment. The proposed control method is able to share equal load power, though there is a mismatch in line impedances in the AC microgrid network. In this study, the microgrid test system with two parallel DGs is used to evaluate the performance of the proposed model. To show the effectiveness of the proposed control method, the simulation results of the proposed model have also been compared with the conventional droop control technique. The proposed model has superior performance compared to the conventional droop controller in terms of load power sharing and maintaining tolerance limits, as evidenced by the simulation results
  • Design and Analysis of DC-DC Boost converter using Model Predictive Controller

    Dr Naresh Kumar Vemula, Ms Devarapalli Vimala, Devarapalli Vimala., Bhamidi Lokeshgupta

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    A boost converter is a type of device used to convert direct current (DC) from one voltage level to another. It operates by increasing the input voltage to a higher output voltage level.DC-DC converters are utilised in a wide range of applications. The primary application of boost converters is to establish an interface with renewable energy sources.This paper presents a comparative analysis of two controllers, namely the Proportional Integral controller and Model Predictive Control (MPC), for practical applications of the Boost converter. The boost converter is designed and simulated in the MATLAB/SIMULINK environment for this study.The performance of the MPC controller is found to be superior when compared to the PI controller.The effectiveness of the proposed control scheme is validated through the utilisation of OPAL-RT
  • An optimized integral performance criterion based commercial PID controller design for boost converter

    Dr Naresh Kumar Vemula, Gundavarapu Venkata Nagesh Kumar., Łukasz Knypiński., Mohammad Irshad., Ramesh Devarapalli

    Source Title: Journal of Electrical Engineering, Quartile: Q3

    View abstract ⏷

    Boost converters often face challenges such as sluggish dynamic behavior, inadequate voltage regulation, and variations in input voltage and load current. These issues necessitate the need for closed-loop operation. Nature-inspired optimization algorithms (NIOA) have demonstrated their effectiveness in delivering enhanced solutions for various engineering problems. Several studies have been conducted on the use of proportional-integral-derivative (PID) controllers for controlling boost converters, as documented in the literature. Some studies have shown that using fractional order PID (FO-PID) controllers can lead to better performance than traditional PID controllers. Nevertheless, implementing FO-PID can be quite complex. Considering the widespread use of commercial PID controllers in industrial settings, this study focuses on finding the best tuning for these controllers in DC-DC boost converters. The approach used is particle swarm optimization (PSO) based on integral performance criteria. Simulation results indicate that the proposed controller achieves superior performance, evidenced by the lowest settling time, overshoot, integral absolute error (IAE), and integral squared error (ISE) values under varying input voltage and load current conditions, compared to both PID and FO-PID controllers. These findings have been confirmed through hardware implementation, which demonstrates the effectiveness of the proposed controller.
  • Investigation into PV Inverter Topologies from the Standards Compliance Viewpoint

    Dr Naresh Kumar Vemula, Hasan M A., Devarapalli R., Knypiński Ł

    Source Title: Energies, Quartile: Q1

    View abstract ⏷

    Numerous reviews are available in the literature on PV inverter topologies. These reviews have intensively investigated the available PV inverter topologies from their modulation techniques, control strategies, cost, and performance aspects. However, their compliance with industrial standards has not been investigated in detail so far in the literature. There are various standards such as North American standards (UL1741, IEEE1547, and CSA 22.2) and Australian and European safety standards and grid codes, which include IEC 62109 and VDE. These standards provide detailed guidelines and expectations to be fulfilled by a PV inverter topology. Adherence to these standards is essential and crucial for the successful operation of PV inverters, be it a standalone or grid-tied mode of operation. This paper investigates different PV inverter topologies from the aspect of their adherence to different standards. Both standalone and grid-tied mode of operation-linked conditions have been checked for different topologies. This investigation will help power engineers in selecting suitable PV inverter topology for their specific applications. © 2024 by the authors.
  • Quasi-Steady-State Modeling of BLDC Motor Equivalent Circuit for Discontinuous Current Conduction with Unipolar PWM

    Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, Dr Kiran Kumar Nallamekala, Mousam Ghosh., Kaibalya Prasad Panda

    Source Title: 2024 IEEE 4th International Conference on Sustainable Energy and Future Electric Transportation (SEFET),

    View abstract ⏷

    The equivalent circuit of a voltage source inverter (VSI) fed brushless DC (BLDC) motor is similar to a buck converter supplied brushed DC motor. This analogy derives a linear relationship between the duty ratio and motor speed for continuous current conduction mode (CCCM). However, this relationship is not linear for discontinuous current conduction mode (DCCM), which is not generally considered in literature while controllers are designed. The DCCM of the BLDC motor driven by unipolar pulse width modulation (PWM) controlled voltage source inverter is analyzed, and corresponding quasi-steady-state model is derived in this paper. The motor speed can be precisely determined by simple computations with the proposed DCCM model, which can lead to complexity reduction in controller design. The effectiveness of the proposed model has been validated by the simulation and experimental analysis.
Contact Details

nareshkumar.v@srmap.edu.in

Scholars

Doctoral Scholars

  • Ms Devarapalli Vimala

Interests

  • Microgrid
  • Power System
  • Small Signal Stability Analysis and Control

Education
2011
B.Tech
Vignan Institute of Information Technology
India
2013
Mtech
National Institute of Technology
India
2021
PhD
Indian Institute of Technology
India
Experience
  • March 2022 to May 2023 - Associate Professor - Lendi Institute of Engineering of Technology, Vizianagaram, Andhra Pradesh
Research Interests
  • Small signal stability assessment and enhancement of inverter-fed autonomous microgrids
  • Improvement in dynamic response of parallel operated inverters with different control techniques
  • Parametric optimization and delay compensation to improve robustness in a Microgrid
Awards & Fellowships
  • 2019 – MHRD SPARC Scheme Fellowship – IIT Patna
Memberships
No data available
Publications
  • A cost-effective hardware accelerator for PMDC motor-based auxiliary component automation of electric three-wheelers

    Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, Atanu Banerjee., Mousam Ghosh., Pramod Kumar Meher., B Chitti Babu

    Source Title: AEU - International Journal of Electronics and Communications, Quartile: Q1

    View abstract ⏷

    A quadral-duty digital pulse width modulation (QDPWM) control-based hardware accelerator for the auxiliary permanent magnet brushed DC (PMDC) motors of electric three-wheelers (E3Ws) is proposed. The proposed accelerator involves a precise motor speed calculation circuit, including a buffer to hold the position encoder signal for a predefined number of clock cycles to eliminate encoder signal noise. The proposed hardware accelerator is described with supporting mathematical models and is implemented on field-programmable gate array (FPGA) as well as application-specific integrated circuit (ASIC) platforms using SCL 180 nm CMOS technology library. The ASIC implementation at 12.5 MHz shows that the proposed design has significantly less area and power consumption than the conventional PI-PWM controller-based architecture and is comparable to the dual-duty digital pulse width modulation (DDPWM) controller. The proposed FPGA prototype-driven motor attains a wider speed range with low-speed ripple than DDPWM controller-based architecture. The position signal buffer circuit also enables the accelerator to tolerate noise or glitches in the position encoder signal, which makes the speed calculation precise and reliable. The proposed hardware accelerator-based PMDC drive performance has been validated regarding settling time, speed tracking ability, tolerance to dynamic speed, and load variations on a laboratory test setup
  • Enhancement of Dynamic Performance and stability of Autonomous Microgrid Utilizing Adaptive HBO-Power System Stabilizer

    Dr Naresh Kumar Vemula, Andrew Joseph Mbusi., Idris Abdallah Nasreldin

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    Power and frequency instability pose significant challenges in microgrid operation, which restricts load sharing and degrades dynamic performance. Existing control methods often involve trade-offs between stability and power sharing. Conventional power system stabilizers (PSS) utilize lead-lag compensators with parameters selected arbitrarily, resulting in less than optimal performance during disturbances. This research paper presents a novel, generalized PSS designed for inverter-based microgrids. It incorporates an adaptive Honey Bee Optimization (HBO) algorithm for dynamic tuning of the lead compensator parameters T1,T2, and gain K. Unlike traditional methods, the proposed HBO-PSS improves the damping of low-frequency oscillations and enhances power sharing accuracy, while maintaining stable output voltage. The time-domain simulation results indicate that the adaptive HBO-PSS demonstrates superior performance compares to existing methodologies. The proposed PSS facilitates faster and more equitable power sharing, while also enhancing stability significantly, even in the presence of switching disturbances and higher droop coefficients. This work simplifies the implementation and analysis of PSS while facilitating future research into decentralized control strategies for distributed energy systems
  • Customized Inverter Configuration for Multiple pole-Pair Stator Winding Induction Motor Drive with Reduced DC Bus Voltage

    Dr Kiran Kumar Nallamekala, Dr Tarkeshwar Mahto, Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, K K N V A Manikanta., G Jawahar Sagar

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    A new customized multi-level inverter (MLI) configuration is proposed for induction motor drive, aiming to lower the requirement of DC bus voltage magnitude. This method utilizes pole pair winding coils separately to generate multi-level voltage waveform across the total stator phase windings. As the inverter requires lower input voltage it eliminates the requirement of boost converters when it is used in the EV applications. The inherent advantages of this topology significantly reduce control complexity in the battery systems by reducing the number of series-connected battery cells. The conventional LevelShifted Sine Triangle PWM technique proficiently shifts low-frequency harmonics to the carrier frequency, enhancing power quality and minimizing electromagnetic interference. Through MATLAB simulation, this new customized multi-level inverterfed open-end stator winding Induction motor is simulated and results are presented to validate the proposed concept. Ultimately, our research aims to contribute to advancing electric vehicle technology by operating the induction motor with minimal input DC source voltage, and substantial output gain
  • A Finite Control Set based Model Predictive Controller for Load Power Sharing Applications in Inverter Fed Microgrids

    Dr Naresh Kumar Vemula, Ms Devarapalli Vimala, Bhamidi Lokeshgupta

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    Microgrids have gained more attention in recent days due to the efficient integration of various distributed energy resources. However, the load power sharing between the distribution generators (DGs) in the microgrids is one of the major challenges, especially at the peak load demand condition. This paper proposes a finite control set-based model predictive controller (FCS-MPC) for the DG-fed inverters in microgrid applications. A universal droop controller model is also considered into account to generate the reference values for the proposed FCS-MPC controller for improved power sharing. The main goal of this paper is to efficiently regulate the power flow from/to the parallel DGs in a microgrid environment. The proposed control method is able to share equal load power, though there is a mismatch in line impedances in the AC microgrid network. In this study, the microgrid test system with two parallel DGs is used to evaluate the performance of the proposed model. To show the effectiveness of the proposed control method, the simulation results of the proposed model have also been compared with the conventional droop control technique. The proposed model has superior performance compared to the conventional droop controller in terms of load power sharing and maintaining tolerance limits, as evidenced by the simulation results
  • Design and Analysis of DC-DC Boost converter using Model Predictive Controller

    Dr Naresh Kumar Vemula, Ms Devarapalli Vimala, Devarapalli Vimala., Bhamidi Lokeshgupta

    Source Title: 2025 Fourth International Conference on Power, Control and Computing Technologies (ICPC2T),

    View abstract ⏷

    A boost converter is a type of device used to convert direct current (DC) from one voltage level to another. It operates by increasing the input voltage to a higher output voltage level.DC-DC converters are utilised in a wide range of applications. The primary application of boost converters is to establish an interface with renewable energy sources.This paper presents a comparative analysis of two controllers, namely the Proportional Integral controller and Model Predictive Control (MPC), for practical applications of the Boost converter. The boost converter is designed and simulated in the MATLAB/SIMULINK environment for this study.The performance of the MPC controller is found to be superior when compared to the PI controller.The effectiveness of the proposed control scheme is validated through the utilisation of OPAL-RT
  • An optimized integral performance criterion based commercial PID controller design for boost converter

    Dr Naresh Kumar Vemula, Gundavarapu Venkata Nagesh Kumar., Łukasz Knypiński., Mohammad Irshad., Ramesh Devarapalli

    Source Title: Journal of Electrical Engineering, Quartile: Q3

    View abstract ⏷

    Boost converters often face challenges such as sluggish dynamic behavior, inadequate voltage regulation, and variations in input voltage and load current. These issues necessitate the need for closed-loop operation. Nature-inspired optimization algorithms (NIOA) have demonstrated their effectiveness in delivering enhanced solutions for various engineering problems. Several studies have been conducted on the use of proportional-integral-derivative (PID) controllers for controlling boost converters, as documented in the literature. Some studies have shown that using fractional order PID (FO-PID) controllers can lead to better performance than traditional PID controllers. Nevertheless, implementing FO-PID can be quite complex. Considering the widespread use of commercial PID controllers in industrial settings, this study focuses on finding the best tuning for these controllers in DC-DC boost converters. The approach used is particle swarm optimization (PSO) based on integral performance criteria. Simulation results indicate that the proposed controller achieves superior performance, evidenced by the lowest settling time, overshoot, integral absolute error (IAE), and integral squared error (ISE) values under varying input voltage and load current conditions, compared to both PID and FO-PID controllers. These findings have been confirmed through hardware implementation, which demonstrates the effectiveness of the proposed controller.
  • Investigation into PV Inverter Topologies from the Standards Compliance Viewpoint

    Dr Naresh Kumar Vemula, Hasan M A., Devarapalli R., Knypiński Ł

    Source Title: Energies, Quartile: Q1

    View abstract ⏷

    Numerous reviews are available in the literature on PV inverter topologies. These reviews have intensively investigated the available PV inverter topologies from their modulation techniques, control strategies, cost, and performance aspects. However, their compliance with industrial standards has not been investigated in detail so far in the literature. There are various standards such as North American standards (UL1741, IEEE1547, and CSA 22.2) and Australian and European safety standards and grid codes, which include IEC 62109 and VDE. These standards provide detailed guidelines and expectations to be fulfilled by a PV inverter topology. Adherence to these standards is essential and crucial for the successful operation of PV inverters, be it a standalone or grid-tied mode of operation. This paper investigates different PV inverter topologies from the aspect of their adherence to different standards. Both standalone and grid-tied mode of operation-linked conditions have been checked for different topologies. This investigation will help power engineers in selecting suitable PV inverter topology for their specific applications. © 2024 by the authors.
  • Quasi-Steady-State Modeling of BLDC Motor Equivalent Circuit for Discontinuous Current Conduction with Unipolar PWM

    Dr Pratikanta Mishra, Dr Naresh Kumar Vemula, Dr Kiran Kumar Nallamekala, Mousam Ghosh., Kaibalya Prasad Panda

    Source Title: 2024 IEEE 4th International Conference on Sustainable Energy and Future Electric Transportation (SEFET),

    View abstract ⏷

    The equivalent circuit of a voltage source inverter (VSI) fed brushless DC (BLDC) motor is similar to a buck converter supplied brushed DC motor. This analogy derives a linear relationship between the duty ratio and motor speed for continuous current conduction mode (CCCM). However, this relationship is not linear for discontinuous current conduction mode (DCCM), which is not generally considered in literature while controllers are designed. The DCCM of the BLDC motor driven by unipolar pulse width modulation (PWM) controlled voltage source inverter is analyzed, and corresponding quasi-steady-state model is derived in this paper. The motor speed can be precisely determined by simple computations with the proposed DCCM model, which can lead to complexity reduction in controller design. The effectiveness of the proposed model has been validated by the simulation and experimental analysis.
Contact Details

nareshkumar.v@srmap.edu.in

Scholars

Doctoral Scholars

  • Ms Devarapalli Vimala